To meet the requirement of reducing the fabricating cost, the number of semiconductor devices in a single wafer and the diameter of the wafer are continuously increased. As the diameter of the wafer is bigger and bigger, the thickness of the wafer is also required to be increased to ensure that the wafer is capable of enduring the stress in various fabricating processes of the semiconductor devices. Accordingly, after the semiconductor devices are formed on the front surface, a thinning process to the back surface is required if some processes such as ion implantation, high temperature annealing and forming back electrodes are intended to be performed on the back surface. Generally, the thinning process includes grinding the back surface with a tool, and two typical grinding methods of the wafer are described below accompanying with figures.
FIGS. 1A and 1B are schematic views of a full grinding method of a wafer. As shown in the side view of FIG. 1A, a wafer 100 includes a first surface 110 and a second surface 120. The first surface 110 is bonded to a temporary bonding layer T1 thereby fixing the wafer 100 onto a carrier C1. Then, the second surface 120 is entirely grinded with a grinding tool G1 to thin the wafer 100. Referring to FIG. 1B, a side view of a thinned wafer 101 which is bonded to a temporary bonding layer T1 fixed on the carrier C1 is shown.
As described above, the wafer can be thinned with the above full grinding method. However, the temporary bonding layer should be used in the above method, and the temporary bonding layer will lost viscosity when the temperature exceed to a value such as 260 degrees centigrade. That is, when the process temperature is higher than 260 degrees centigrade, the thinned wafer can't be fixed on the carrier and transported to the next process.
FIGS. 2A and 2B are schematic views of a partial grinding method of a wafer. As shown in the side view of FIG. 2A, a wafer 100 includes a first surface 110 and a second surface 120. The wafer 100 is fixed on a carrier C2. Then, a region of the second surface 120 (i.e., the region in the dashed lines) is grinded with a grinding tool G2 while a peripheral region (i.e., the region outside the dashed lines) is remained. Referring to FIG. 2B, a side view of a thinned wafer 102 is shown.
In the partial grinding method, the wafer can be thinned, and the remained peripheral portion of the wafer can be used as a supporting structure to transport the thinned wafer to a next work station. However, only a part of the second surface is grinded, and thus warpage of the thinned wafer easily occurs. In addition, special equipment is needed to perform the partial grinding method. Therefore, the fabricating cost is increased.
Thus, how to overcome shortages of the above methods is the main agenda while developing the thinning method of wafer.